In recent wireline communication designs, data rates higher than about 50 Gbps are becoming common even without the utilization of multi-level signaling (e.g., PAM-4). A reliable clock source may provide greater than about 25 GHz differential or greater than about 12.5 GHz quadrature timing. For low-power applications, feed-forward clocking is a promising technology, which utilizes both I and Q clock signals from the source. This requirement may effectively double the frequency target of the oscillator. For example, an about 25 Gbps system may utilize an about 25 GHz differential ring oscillator, then generate about 12.5 GHz quadrature clocks using a clock divider. In a similar link design potentially running at about 50 Gbps, the equivalent frequency of the oscillator would be at least about 50 GHz, which is impractical for a ring oscillator. An example of a ring oscillator is a device comprising an odd number of NOT gates in a ring, whose output oscillates between two voltage levels, representing true and false.
Another design challenge in high-speed clocking is the phase interpolator circuit. In feed-forward clocking systems, the phase interpolator circuit is important for performance characterization. The phase interpolator circuit is preferably continuously operational to compensate the delay mismatch between data lanes (DQs) and strobe lane (DQ-S) arising from loading mismatches at both the signal transmitter circuit and the signal receiver circuit. Phase interpolator circuits tend to be expensive in both power consumption and circuit area, especially when good resolution is required.
A conventional three-stage differential oscillator 100 utilizes inverter-based cross-coupling as shown in FIG. 1, which correlates the signal phase between opposite circuit nodes (e.g., 0 and 180 degrees). This cross-coupling works well when there is negligible signal delay between the inverters' inputs and outputs. However, in practice, the inverter delay may cause driving strength contention between the main loop circuit and coupling elements and slow down the oscillation frequency by about 30-40% as compared to single ring oscillator.
The use of inverter-based cross-coupling in conventional differential oscillators (FIG. 1) thus incurs an about 30-40% oscillation frequency reduction compared to a single three-phase ring oscillator. Normally, the benefit from inverter-based cross-coupling is better common-mode voltage definition, for example, they can be applied as differential clock sources. But a ring oscillator with an odd number of stages generally can intrinsically determine the common-mode. Thus, inverter-based cross-coupling in oscillators provides signal phase correlation but in an inefficient manner.